Computer Architecture Lab/SS2013/GROUP4 ASSIGNMENT2

< Computer Architecture Lab < SS2013

Group 4
Ioannis Kotleas s122576
Chatzigeorgakidis Georgios s121078
Dean Roy Humphreys s120971
Tobias Bennike Aagren s112345

Instruction set for JOP inspired Stack Machine

Architecture specifications

The computer architecture that the following instruction set is intended for is a stack machine with three pipeline stages inspired by JOP. It consists of:

RAM virtually split into

◦ Dual port cache for the Parameter stack

◦ Cache for program memory

Subroutine stack memory with depth of 100 for 100 nesting levels (to be adjusted as design requires)
Two registers (A & B) for the TOP and TOP-1 of the stack which are the arguements to the ALU
One register (p) holding the address pointing to TOS-2 in the Parameter stack
One register (VP) holding the address pointing to the variable section of the memory
One register (i) holding the address to the top of the Subroutine stack
The program counter register (PC)
The ALU

Pipeline stages:

FETCH
DECODE
EXECUTE-LOAD-STORE

Instruction set specifications

The instructions are of fixed size. An immediate value is passed through an instruction field to the execution. Most of the instructions are handled within one clock cycle, as a result of the pipelining. Some instructions though require a second clock cycle in order to pass a parameter (value or address) through the program memory.

Instruction format:

Single cycle

Control bits

Immediate

Two cycle with parameter passing

Control bits	Immediate
Value

Instructions

	LOAD n	A <- sm(VP + signext(n))	B <- A	sm(p + 1) <- B	p <- p + 1				Loads from memory address VP+immediate(n) to A and pushes the stack.
	LOAD n	A <- sm(A + signext(n))	B <- B	p <- p					Loads from memory address A+immediate(n) to A.
	n short	A <- signext(n)	B <- A	sm(p + 1) <- B	p <- p + 1				Loads short immediate value(n) to A and pushes the stack.
	LOAD val	A <- IR	B <- A	sm(p + 1) <- B	p <- p + 1				Loads program memory parameter to A and pushes the stack.
	STORE n	sm(B + signext(n)) <- A	A <- B	B <- sm(p)	p <- p - 1				Stores value of A to address specified in B with offset n and pops the stack.
Memory access	STORE n	sm(VP + signext(n)) <- A	A <- B	B <- sm(p)	p <- p - 1				Stores value of A to address specified in VP with offset n and pops the stack.
	STORE n	sm(A) <- signext(n)	B <- sm(p)	p <- p - 1					Stores short immediate value (n) to address defined by A and pops the stack.
	STORE add	sm(IR) <- A	A <- B	B <- sm(p)	p <- p - 1				Stores A to address passes through the program memory as a parameter.
	STORE add, n	sm(IR) <- signext(n)	A <- A	B <- B	p <- p				Store short immediate (n) to address passed as a parameter from the program memory.
	STORE val, n	sm(A + signext(n)) <- IR	A <- B	B <- sm(p)	p <- p - 1				Store program memory parameter to address in A with offset specified by the immediate (n).
	STORE val, n	sm(VP + signext(n)) <- IR	A <- A	B <- B	p <- p				Store program memory parameter to variable address VP with immediate offset (n)
ALU operations on top of stack	OP1	A <- ALU	B <- B	p <- p					Store the result of ALU to A.
ALU operations with two arguements	OP2	A <- ALU	B <- sm(p)	p <- p - 1					Store the result of ALU to A and pop the rest of stack.
	BRANCH n	A <- B	B <- sm(p)	p <- p - 1	If (A == 0)	PC <- PC + signext(n)			Relative branch to PC+immediate(n) if A is 0 and pop the stack.
	BRANCH	A <- B	B <- sm(p)	p <- p - 1	If (A == 0)	PC <- B			Non-relative branch to address in B if A=0 and pop the stack.
	BRANCH val	A <- B	B <- sm(p)	p <- p - 1	If (A == 0)	PC <- IR			Non-relative branch to program memory parameter with immediate offset if A=0 and pop the stack.
Flow control	JUMP n	A <- A	B <- B	p <- p	PC <- PC + signext(n)				Relative jump to PC+innediate offset(n).
	JUMP	A <- B	B <- sm(p)	p <- p - 1	PC <- A				Non-relative jump to address in A and pop the stack.
	JUMP add	A <- A	B <- B	p <- p	PC <- IR				Non-relative jump to address passed through the program memory as parameter.
	PREPARE n	A <- PC + signext(n)	B <- A	sm(p + 1) <- B	p <- p + 1				Load the PC+immediate offset to A and push the stack.
Subroutine control	CALL n	PC <- A	A <- signext(-n)	B <- B	p <- p	im(i + 1) <- PC	i <- i + 1	VP <- VP + signext(n)	Transfer execution to address in A. Push current PC to subroutine stack. Increment VP by immediate. Store immediate in A.
	RETURN	PC <- im(i)	i <- I - 1	A <- A	B <- sm(p)	p <- p - 1	VP <- VP + B		Pop subroutine stack to PC. At this point A MUST contain the return value of the function and B the value by which the VP had been incremented when calling the routine. Therefore, restore VP and pop the rest of the parameter stack.
Stack Operations	DUPLICATE	A <- A	B <- A	sm(p + 1) <- B	p <- p + 1				A's vlaue remains the same and at the same time it is transferred to B. B's value is pushed on top of stack memory and p is incremented in order to point at B.

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