360 Assembly/360 Instructions/AR

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AR - Add Register - Opcode 1A

Format

AR 2,1

The specific syntax is

AR target register, source register.
RR Instruction (2 bytes)
Byte 1 Byte 2
target register source register
(8 bits)
Opcode
1A
(4 bits)

0..F
(4 bits)

0..F

Availability

The AR instruction is available on all models of the 360, 370 and z/System.

Operation

The AR instruction reads 32-bit integer value from the register specified by the second argument and adds it to the value of register specified by the first argument. The Condition Code field in the Program Status Word is changed according to the resulting value.

Condition Codes

If signed integer overflow occurs, i.e. sum is not between -2**31 and 2**31-1, CC is set to 3. Otherwise, CC is set to 0, 1 or 2, if sum is equal to zero, below zero or above zero accordingly.

Exceptions and Faults

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