360 Assembly/360 Architecture

The 360 architecture is a 32-bit machine (64-bit for z/System), in which the standard word size is 32 bits. The 360 supports up to 16 megibytes (2^24 or 16*1024^3) of memory and 24-bit addressing. The 370 supports up to 2 gigibytes (2^31) of memory and 31-bit addressing. The z/System supports up to 16 exbibytes (2^64) of memory and 64-bit addressing.

Features

The 360 architecture has:-

• 16 general purpose 32-bit registers (64-bit on the z/System) numbered 0 to 15 (usually Equated to the labels "R0" through "R15")
• 16 32-bit access registers numbered 0 to 15 if access mode is enabled (bits 16 and 17 of the PSW are set to X'01'); (Access registers are not available on the 360)
• 16 privileged 32-bit control registers, 0 to 15, used to control various operations of the computer (not available on the 360)
• 4 floating point 64-bit registers numbered 0, 2, 4 and 6, while the 370, 390, and z/System have a full 15 floating-point registers, and
• a 64-bit (128 bit on z/System) Program Status Word (PSW). The Program Status Word is comprised of the privileged bit, the program counter, and the memory protection key, among other flag bits.

Privileged and Problem States

The privileged bit (15) of the PSW indicates the state of the program that is currently executing. There are two states, problem (0) and supervisor (1). A program is said to be in "supervisor state" if the privileged bit is set, and "problem state" if it is clear.

Problem state is where all user software operates. Problem state applications ("problem programs") have restrictions including memory read and write restrictions, and cannot directly issue I/O instructions.

Supervisor state is reserved for the operating system and any of its components. Some operating systems have the capacity for a program to be marked as "authorized," in which case the program can run in supervisor state.

Memory Protection

The memory protection key (bits 8-11) is 4 bits and determines which memory areas a particular program has access to. Pages of the computer's memory are marked with certain protection keys, and only a program running with the same key (or key of zero) may write to a particular section of memory. Some versions of the hardware have read protection as well.

Virtual Memory

The 370 and above support "Dynamic Address Translation" in which a program can be loaded into a virtual address and the virtual address is translated automatically into a real address directly by the hardware. Multipl;e programs can be mapped into more virtual memory than the machine actually possesses, allowing more programs than can actually fit in memory to run simultaneously, or to allow programs larger than the actual amount of memory available to be run. The operating system can write pages to and read from disk space to store programs when not executing, or when not using all of their memory.

Exceptions

As programs do not always work correctly, or may require certain actions to be performed on their behalf by the operating system, the 360 series support various exceptions to indicate an event has occurred. Some exceptions indicate errors, possible attempts to violate security, ordinary system requests, or machine damage. Some of the more common of the many exceptions available are as follows:

• Addressing - Reference to non-existent memory. While this is often a programming error, if a program accesses virtual memory that is not swapped in, this exception would legitimately occur.
• Clock - The time-of-day clock has signalled another second has occurred
• Data - Invalid decimal data values in packed arithmetic, out-of-range values in certain arithmetic or trap instructions,
• Decimal Divide - Division by 0 with decimal arithmetic instructions
• Decimal Overflow - Digits are lost when a result is too large for the area supplied
• External Interrupt - A device attached to the computer has signalled an interrupt
• Execute - An attempt is made to use an EXECUTE instruction on an instruction with the EXECUTE opcode
• Fixed-Point Divide - Division by 0 with binary arithmetic instructions
• Fixed-Point Overflow - Result exceeds the maximum value permissible
• Floating-Point Divide - Division by 0 with F.P. arithmetic instructions
• Floating-Point Significance - Fraction becomes zero
• Floating-Point Square Root - Value less than zero
• I/O Interrupt - An input or output device (printer, keyboard, Ethernet) has signalled that it has finished processing data or commands sent to it or has input available
• Machine Check - Some part of the hardware has had a failure
• Monitor - Flagged value in MONITOR CALL instruction is used
• Operand - Certain values given to I/O instructions is incorrect
• Operation - Attempt to execute an invalid operation code
• Page Translation - The memory page to be referenced has its address table marked as invalid (this would not necessarily be an error, it might mean the operating system has swapped that page out and it needs to be restored)
• Primary Authority - Incorrect or invalid valies givem to the PROGRAM TRANSFER instruction
• Privileged Operation - A problem program attempts to execute a privileged instruction
• Protection - Accessing invalid, non-existent or unauthorized memory
• Specification - Attempt to execute an instruction at an odd address; use an incorrect floating-point register in some F.P. arithmetic instructions; using a memory address in an instruction that is not on the correct address boundary (half word, word, double word) for that instruction
• Supervisor Call - The program has issued a SUPERVISOR CALL instruction. This is not an error conditon
• Timer Interrupt - The interrupt timer has signalled a time limit has occurred
• Translation - Invalid code given to the PROGRAM CALL instruction

Register Conventions

Certain registers on the 360 are "reserved" either by hardware requirements, or by convention (operating system usage or common practice). Note these are mere conventions or general practice, as technically no general register is reserved to any specific use at all.

Register 0 is generally used in a number of instructions as a placeholder to indicate a lack of action. Many (non-RR) instructions treat use of register 0 as having a presumed value of zero or equivalent to address X'00000000' in memory (X'0000000000000000' on 64-bit models). Depending on the operating system and whether address 0 is real address 0 or a virtual address, this area may be protected against reading, writing, or both (unless the current task is operating in supervisor state or storage key 0).

Register 1 is, by convention, used to point to the list of arguments (32 bit addresses) passed to a called subroutine, and for passing arguments for operating system calls (SVC's). It is also used by the Translate and Test instruction TRT specifically.

Register 2 may be used by some operating systems, or by certain instructions for additional parameters or return values, but is usually available for general use.

Register 3 thru Register 12 are available for general use (except on Linus where registers numbered below 7 may be used for arguments to Supervisor Calls).

Register 13 is, by convention, used to point to a save area for storing the passed registers by a called subroutine. It is the logical equivalent of a "stack pointer" on processors that have a stack. Programs running as standalone applications that call no subroutines may use this register for any purpose, but this is not recommended without placing warnings in the source code that this is being done, as it is non-standard and may be missed by anyone who later performs maintenance on that application.

Register 14 is, by convention, used to provide the address for a called subroutine to return to the caller.

Register 15 is, by convention, used to provide the entry point address of a called subroutine and to provide the initial base register for the subroutine. The subroutine may continue to use register 15 as its base register if it is short (and doesn't itself call a lower level subroutine or issue a Supervisor Call that changes Register 15) or, more typically, it will save this register (and others) immediately in the provided save area of Register 13 and use a different register (or set of registers) for the base. Also, register 15 may be used by some operating systems to provide some arguments for (or return values from) SVC's. Its use for this purpose bears some similarity to the Program Counter register on some mini and microcomputers. Register 15, by convention, is also frequently used as a return value from called subroutines, often set to an index value (0,4,8,12 etc.), suitable for direct use in a branch table immediately after return.

When a program runs on the Linux operating system, supervisor calls are passed up to 6 values in registers 1 through 6, respectively. When a program runs on OS/VS1 or z/OS, Supervisor Calls are passed values in register 0, 1, or if more than 2, in a list pointed to by register 1.

Program Status Word

The Program Status Word (PSW) is a 64-bit (on the IBM 360, 370, ESA/390, Univac and Fujitsu) or 128 bit (on the IBM z/System) privileged register which contains information about the current state of the machine (bit 12 determines if it is a 64-bit or 128 bit register). Unlike the general registers, the PSW is not directly accessible either to read or write. Privileged programs can change the contents of the entire PSW through the privileged LPSW (on 360/370/390 series) or LPSWE (on z/System) instructions. Non-privileged programs may change some bits in the PSW through execution of comparison instructions, test instructions and the SVC instruction, or through certain arithmetic and comparison instructions, as well as via branch instructions. Sections of the PSW which have fixed values are shown in the table below in green.

An explanation of the fields in the PSW is as follows.

• (R) - Bit 1: Set (value 1) to allow Program Event Recording (PER) interrupts if certain PER event-mask bits are set in Control Register 9.
• (T) - Bit 5: Set if Dynamic Address Translation (DAT) is enabled; this allows for virtualization of addresses; if clear, all addresses used in registers are real addresses.
• (IO) - Bit 6: Set if Input/Outpit (IO) interrupts can occur, controlled by bits in Control Register 6.
• (EX) - Bit 7: Set if external interrupts can occur.
• (Key) - Bits 8-11: Contains the storage key for the current running task. This key is 0 for privileged tasks. A task may only write to areas of memory which are marked with the same key unless its key is 0. Some models may allow or prohibit reading of memory marked with a different key (for a task not running with a key of 0) depending on what the operating system has chosen. Some operating systems allow (read-only) access to locations below X'1000' in order to allow user programs to read pointers to system tables. (This presumes the user program is not running at virtual address 0).
• (Type) - Bit 12: Set for 64-bit PSW; clear if 128-bit PSW.
• (M) - Bit 13: Set if a Machine Check interrupt is permitted to occur in the event of detection of damage. Subject to mask bits set in Control Register 14.
• (W) - Bit 14: Set if the machine is in wait state, clear if the machine is running.
• (P) - Bit 15: Set if the machine is in supervisor state, clear if the machine is in problem state.
• (AS)- Bits 16 and 17: Used in combination with the T-bit to control how address translation is to be performed.

• (CC)- Bits 18 and 19: Condition Code, used to indicate the results of an arithmetic, comparison, test, or logical instruction.

• (Prog Mask) - Bits 20-23: Indicates if certain arithmetic exceptions are masked against causing an interrupt. These bits can be set or cleared through the SPM instruction. These masks are
  • Bit 20 - Integer overflow
  • Bit 21 - Decimal overflow
  • Bit 22 - Floating-point underflow
  • Bit 23 - Floating-point overflow
• (RI) (128-bit PSW) - Bit 24: Reserved for IBM use.
• (A) (64-bit PSW) - Bit 32: Set if 31-bit addressing is enabled; clear if 24-bit addressing is in use.
• (Instruction Address) address of the current instruction being executed:
  • (64-bit PSW) - Bits 33-63: 24-bit address (or 31-bit if A-bit is set).
  • (128-bit PSW) - Bits 64-127: 64-bit address.
• {EA} and (BA) - Bit 31 and 32 {128-bit PSW) : Controls Addressing Mode. If EA and BA are zero; 24-bit addressing is in effect. If EA is 0 and BA is 1, 31 bit addressing is in effect. If Both are 1, 64-bit addressing is in effect. If EA is 1 and BA is 0, a specification exception will be thrown.